The setup time in datasheet is specified as -1.2ns (negative value). This means data can be ready 1.2ns after the active edge of clock. The clock cycle to meet the setup time and hold time requirements is -1.2ns + 2ns = 0.8ns, which is less than 2ns clock period (at 500MHz). So, the part should be able to operate at 500MHz of clock frequency.
For more detailed explanation about setup and hold times, please refer to the technical note below:
https://www.maximintegrated.com/en/design/technical-documents/tutorials/4/4053.html
